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There are multiple RISC-V ports of xv6, including one for the Allwinner D1: https://github.com/michaelengel/xv6-d1
Zephyr
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RISC-V Maintainers
- Karol Gugala (Antmicro)
- Tomasz Gorochowik (Antmicro)
- Filip Kokosinski (Antmicro)
Releases
RISC-V support has been present in the Zephyr RTOS since:
- v1.7.0, for RV32I (March 2017)
- v2.0.0, for RV64I (September 2019)
- v3.
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- 2.0, for RV32E (September 2022)
RISC-V Status
As of February 2023, dozens of physical (non-emulated) targets are supported in Zephyr.
- List of RISC-V Boards: https://docs.zephyrproject.org/latest/boards/riscv/index.html
- Zephyr release notes: https://docs.zephyrproject.org/latest/releases/index.html