This page gives an overview of upstream projects. If you miss information or find mistakes, please edit.
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Apache NuttX
RISC-V Maintainers
NuttX RTOS has a weaker sense of maintainership than many open-source projects. However, the primary contributors are:
- Janne Rosberg (Offcode)
- Masayuki Ishikawa (Sony Corporation)
- Xiang Xiao (Xiaomi Corporation)
FreeBSD
RISC-V Maintainers
FreeBSD has a weaker sense of maintainership than many open-source projects. However, the primary contributors are:
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Haiku has been ported to RISC-V: https://www.haiku-os.org/blog/kallisti5/2021-11-07_booting_our_risc-v_images/
Hubris
There is an initial port of Hubris to the Freedom E310 core on a Sparkfun RED-V board: https://github.com/oxidecomputer/hubris/discussions/365
Note from Cliff:
> In general, Hubris was originally designed with the intent of moving to RISC-V eventually, which is part of why we're so register-focused in the calling convention.
Illumos
Illumos has been ported to the Allwinner D1: https://github.com/n-hys/illumos-gate/wiki/Allwinner-D1-Nezha
Linux
RISC-V Maintainers
- Palmer Dabbelt
- Albert Ou
- Paul Walmsley
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Since then a range of Distributions have RISC-V ports. E.g.:
- Debian
- Fedora
- openSUSE
- Canonical Ubuntu
- Buildroot
- Yocto
- Arch Linux (Install on Unmatched)
- Gentoo Linux
- openEuler
- AOSP for RISC-V 10, AOSP 12 rebasing effort main repos , PLCT wip repos
- deepin (maintained by deepin-ports SIG)
RISC-V Status
The Linux kernel supports RV64G as well as RV32G.
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There are multiple RISC-V ports of xv6, including one for the xv6 (https://pdos.csail.mit.edu/6.828/2022/xv6.html).
Ports
- iCE40 FPGA https://gitlab.com/x653/xv6-riscv-fpga
- Allwinner D1: https://github.com/michaelengel/xv6-d1
- JH7110 (VisionFive 2): https://github.com/michaelengel/xv6-vf2
Zephyr
RISC-V Maintainers
- Karol Gugala (Antmicro)
- Tomasz Gorochowik (Antmicro)
- Filip Kokosinski (Antmicro)
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