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If you are looking for documentation on a recently ratified extension that has not yet been merged into the published specifications listed on the RISC-V Specifications page, check the table below.  These extensions are completely ratified by RISC-V and will be merged into the final specifications in the coming months.


Specification nameRatification dateNew extension(s)
Zmmul ExtensionJune 2022Zmmul
PMP Enhancements for memory access and execution prevention on Machine mode (Smepmp)November 2021Smepmp
RISC-V Base Cache Management Operation ISA ExtensionsNovember 2021Zicbom, Zicbop, Zicboz
RISC-V Bit-Manipulation ISA-extensionsNovember 2021Zba, Zbb, Zbc, Zbs
RISC-V Count Overflow and Mode-Based Filtering ExtensionNovember 2021Sscofpmf
RISC-V Cryptography Extensions Volume I: Scalar & Entropy Source InstructionsNovember 2021Zbkb, Zbkc, Zbkx, Zknd, Zkne, Zknh, Zksed, Zksh, Zkn, Zks, Zkt, Zk, Zkr
RISC-V State Enable ExtensionNovember 2021Smstateen
RISC-V "stimecmp / vstimecmp" ExtensionNovember 2021Sstc
RISC-V Vector ExtensionNovember 2021Zve32x, Zve32f, Zve64x, Zve64f, Zve64d, Zve, Zvl32b, Zvl64b, Zvl128b, Zvl256b, Zvl512b, Zvl1024b, Zvl, Zv
The RISC-V Instruction Set Manual Volume II: Privileged Architecture November 2021

Sm1p12, Ss1p12, Sv57, Hypervisor, Svinval, Svnapot, Svpbmt

"Zfh" and "Zfhmin" Standard Extensions for Half-Precision Floating-PointNovember 2021Zfh, Zfhmin
"Zfinx", "Zdinx", "Zhinx", "Zhinxmin": Standard Extensions for Floating-Point in Integer RegistersNovember 2021Zfinx, Zdinx, Zhinx, Zhinxmin
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