This page contains the list of all archived ratified technical specification version. For the most recent versions of any specification, see the RISC-V Technical Specifications page.
NOTE: specifications not found on this page have only one version and thus are only available on the RISC-V Technical Specifications page.
ISA Specifications
These sections contain previous, complete versions of the two ISA specification volumes.
The RISC-V Instruction Set Manual Volume I: Unprivileged ISA
| Version | Publish Date | RISC-V Community | Source Repository |
|---|---|---|---|
| 20191213 | Dec. 2019 | Unprivileged Horizontal Committee | riscv/riscv-isa-manual |
The RISC-V Instruction Set Manual Volume II: Privileged Architecture
| Version | Publish Date | RISC-V Community | Source Repository |
|---|---|---|---|
| 20211203 | Dec. 2021 | Privileged Horizontal Committee | riscv/riscv-isa-manual |
ISA Ratification Specifications
This section contains the specifications which were independently ratified and subsequently have been pulled into the appropriate ISA volumes published on the RISC-V Technical Specifications page.
Non-ISA Specifications
These sections contain previous versions of non-ISA specifications.
NOTE: specifications not found on this page have only one version and thus are only available on the RISC-V Technical Specifications page.
RISC-V Supervisor Binary Interface Specification
| Version | Publish Date | Description | RISC-V Community | Source Repository |
|---|---|---|---|---|
| 1.0.0 | May 2022 | Describes the RISC-V Supervisor Binary Interface, known from here on as SBI which enables supervisor-mode (S-mode or VS-mode) software to be portable across all RISC-V implementations by defining an abstraction for platform (or hypervisor) specific functionality. | Privileged Software Horizontal Committee | riscv-non-isa/riscv-sbi-doc |