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ARC Minutes 2025-01-14

ARC Minutes 2025-01-14

Minutes

Sent by: @Vedvyas Shanbhogue

Original Email: https://lists.riscv.org/g/tech-unprivileged/message/982

Jan 14, 2025

Content:

SBI 3.0 Specification:

  • The SBI 3.0 specification (version 3.0-rc3) [1], updated based on prior ARC feedback, has been reviewed.

  • Additional feedback has been provided to the TG in [2]

  • We look forward to receiving an updated specification to complete the review process.

RPMI Specification:

  • The RPMI specification (version 1.0-rc4) [3], updated with prior ARC feedback, has also been reviewed.

  • Following further feedback has been provided to the TG in [4], and further review is ongoing.

  • The specification should explicitly document the physical memory attributes (PMAs) (supported access types, memory ordering, coherence and cacheability, etc.) for RPMI-related memory regions.

  • Avoid using the term "PMA entry." If the intention is to provide guidelines for coalescing RPMI-related memory regions to minimize configurable PMA facilities, such guidance may be included in a non-normative section without using terms like "PMA entry."

  • The use of set/preserve masks for doorbell memory locations provides flexibility in allowing other fields to exist in the same register, but at the expense of having to perform slow read-modify-write operations on a memory-mapped register. Since it appears that doorbell registers would have to be non-volatile, one could potentially pre-compute or know in advance the entire value to be written to the register when sending a doorbell. So how is this flexibility expected to be of more value than the cost of having to perform slow RMW operations to send a doorbell?

  • The specification supports doorbell registers that are 64-bit wide. Please include guidance on how a RV32 OS should write a 64-bit doorbell.

  • The specification should be updated to clearly layer the messaging protocol for invoking services from the underlying transport mechanism used to carry these messages. The shared memory transport should be self-contained in its own section with the layering/interfaces to using the shared memory transport clearly specified in that section. The section specifying the messaging protocol for invoking the services must not include references and must not depend on the shared memory transport. Specifically, please analyze whether concepts such as ringing a doorbell to notify that the tail index has been updated is specific to the shared memory transport or is more generally applicable to other transport mechanisms such as I2C.

References:
[1] SBI 3.0 Specification:
   https://github.com/riscv-non-isa/riscv-sbi-doc/releases/download/v3.0-rc3/riscv-sbi.pdf
[2] SBI Feedback GitHub Issue:
   https://github.com/riscv-non-isa/riscv-sbi-doc/issues/193
[3] RPMI Specification:
   https://github.com/riscv-non-isa/riscv-rpmi/releases/download/v1.0-rc4/riscv-rpmi.pdf
[4] RPMI Feedback Github Issue:
   https://github.com/riscv-non-isa/riscv-rpmi/issues/90


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