Specification Status

Table of Contents

NOTE: We are migrating to Jira. This page might not reflect the current status of the extensions listed here. Please click here for an up-to-date view of the extensions under development.

Overview

The RISC-V specification process is governed by the Ratification Policy and more concisely articulated in the Specification Lifecycle and Milestone Definitions presentation.  To help Task Group Chairs, Vice-chairs, and specification authors navigate this process, the RISC-V Lifecycle Guide has a whole section on "Specification Lifecycle" with an introductory section describing the process and subsections for each milestone that include step-by-step descriptions of the process.

This page serves as the starting point for understanding the status of specifications currently being developed by RISC-V.  This status is best represented as progress toward the key Specification Milestones (Plan, Freeze, and Ratification-ready) which are obtained sequentially.  Specific status for the relevant status columns is detailed in the Status Key section below.  The chairs and vice-chairs of Task Groups, specification authors, and Horizontal and ISA Committee chairs and vice-chairs jointly own ensuring their specifications are listed below and reflect accurate status.

In-process specifications are grouped below into two tables based on whether they impact the RISC-V ISA (In-process ISA Specifications) or not (In-process Non-ISA Specifications).  Items should have links to their respective specification repo (), Ratification Plan() if not a Fast-track item, and an Acceptance Criteria Status checklist (). 

Status of active votes by TSC and Committee Chairs can be found on the RISC-V Vote Status wiki page.

Completed specifications are tracked at the bottom of the page.

This dashboard does NOT intend to show detailed status (that's available in the status checklist for the specification, ), but rather the general status in the journey to ratification. 

NOTE: This page is managed by the RISC-V staff with assistance from each specification owner. To get updates to this page or for questions, contact help@riscv.org.

In-process ISA Specification Status

In-process Non-ISA Specification Status

Status Key

The following steps and associated next sequential steps for the milestones listed in the tables above may be parallelized at times, but are most simply thought of as a sequential set.  All previous steps are done.  For more details on each step,  see the RISC-V Lifecycle Guide section on "Specification Lifecycle" and it's specific subsections for each milestone, including step-by-step descriptions.

The usable Milestone next Steps are as follows:

* Plan Milestone next Steps:

1. build plan
2. review by chairs
3. complete (nothing else to do)

** Freeze Milestone next step:

1. start
2. spec development - stable
3. AR approval (ISA/SW AR)
4. acceptance criteria complete (including waivers, or approval)
5. committee chair approval
6. freeze
7. complete (nothing else to do)

*** Ratification Milestone next step (don't start until freeze is complete):

1. start
2. send out for public review
3. public review complete
4. acceptance criteria complete 
5. committee chair approval
6. TSC approval
7. BOD approval
8. ratified
9. complete (nothing else to do)

++ ISA AR State (owner)

1. Development (not ready for AR) (TG/IC)
2. Queued (AR)
3. Reviewing (AR)
4. Reworking (if necessary as a result of the review after complete goes back to the queue) (TG/IC)
5. Approved (AR)

NOTE: Some Milestone next steps may be marked as "N/A" for "Not Applicable" with an explanation after a trailing "-".  For example, "N/A - Grandfathered" means that the step was skipped due to the fact that the process changed after the step would have been completed and it has been "Grandfathered" in (meaning accepted as N/A) as acceptable.

**** Specification State values:

1. New
2. Plan Complete
3. Stable
4. Frozen
5. Public Review Started
6. Public Review Complete
7. TSC Approved
8. Ratified

Previously Ratified Specifications

2023

ISA Specifications

Ratification Package  : Project repo : Plan doc : Status chklist	extensions included	Task group approved by TSC date	Specification State****	ISA AR State++	Fast Track	Priv / Unpriv	Committee (Owner)	Task Group	Plan Milestone Target Date	Freeze Milestone Target Date	Ratification Milestone Target Date	Plan Milestone Next Step*	Freeze Milestone Next Step**	Ratification Milestone Next Step***	Last Updated	Notes	In RVA2023 profile as mandatory or supported optional	Jira link
Conditional Ops	Zicond	17 Oct 2022	Ratified	Approved	Y	U	Unpriv IC (Philipp)	N/A	Q1'23	Q1'23	Q2'23	complete	complete	complete	01 Dec 2023			Jira link
Hardware Updating of PTE A/D Bits	Svadu	17 Oct 2022	Ratified	Approved	Y	P	Priv IC (Ved Shanbhogue)	N/A	N/A	Q2'23	Q3'23	N/A	complete	complete	01 Dec 2023		y	Jira link
Counter Mode Filtering	Smcntrpmf	11 Feb 2023	Ratified	Approved	Y	U	Priv IC (Beeman Strong)	N/A	Q1'23	Q2'23	Q3'23	complete	complete	complete	01 Dec 2023			Jira Link
Atomic compare-and-swap (CAS)	Zacas	10 Apr 2023	Ratified	Approved (7/10/23)	Y	U	Unpriv IC (Ved, Greg)	N/A	Q2'23	Q3'23	Q4'23	complete	complete	complete	01 Dec 2023			Jira Link
Vector Crypto	Zvbb, Zvbc, Zvkb, Zvkg, Zvkn, Zvknc, Zvkned, Zvkng, Zvknha, Zvkbnhb, Zvks, Zvksc, Zvksed, Zvksg, Zvksh, Zvkt	04 May 2022	Ratified	Approved	N	U	Unpriv IC (Ken Dockser)	Cryptographic Extensions	3Q'22	Q2'23	Q2'23	Complete	Complete	Complete	28 Sep 2023		y	Jira Link
Additional Scalar FP	Zfa	17 Oct 2022	Ratified	Approved	Y	U	Unpriv IC (Andrew Waterman)	N/A	N/A	Q2'23	Q3'23	N/A	Complete	Complete	28 Sep 2023		y	Jira Link
Advanced Interrupt Architecture (AIA)	Smaia, Ssaia	12 Aug 2021	Ratified	Approved	N	P	Priv IC (John Hauser, Anup Patel)	AIA	1Q'22	Q4'22	Q2'23	complete	complete	complete	29 Jun 2023		y	Jira Link
Vector IEEE FP16 Min Support, Arithmetic	Zvfh, Zvfhmin	17 Oct 2022	Ratified	Approved	Y	U	Unpriv IC (Krste)	N/A	N/A	Q4'22	Q2'23	N/A	complete	complete	29 Jun 2023	Blanket waiver	y	Jira Link
Non Temporal Locality Hint	Zihintntl	17 Oct 2022	Ratified	Approved	Y	U	Priv IC (Andrew Waterman)	N/A	N/A	Q2'23		N/A	complete	complete	25 May 2023		y
Code Size Reduction	Zca, Zcb, Zcd, Zce, Zcf, Zcmp, Zcmt	2021	Ratified	Approved	N	U	Unpriv IC (Tariq Kurd)	Code Size Reduction	N/A	Q1'23	Q2'23	N/A	complete	complete	27 Apr 2023		y (Zcb only)
Counters	Zicntr, Zihpm	12 Jul 2022	Ratified	Approved	Y	U	Unpriv IC (Earl Killian)	N/A	N/A	Q4'22	Q1'23	N/A	complete	complete	23 Mar 2023		y
Profiles	Shcounterenw, Shvstvala, Shtvala, Shvstvecd, Shvsatpa, Shgatpa, Sscounterenw, Ssstateen, Sstvala, Sstvecd, Sstvecv, Ssu64xl, Svade, Svbare, Za128rs, Za64rs, Ziccamoa, Ziccif, Zicclsm, Ziccrse, Zic64b	26 Apr 2022	Ratified	Approved	N	U	TSC (Krste/Greg)	Profiles TG	Q2'22	Q4'22	Q1'23	complete	complete	complete	23 Mar 2023		y
Reduced integer bases	RV32E/RV64E	01 Jan 2022	Ratified		Y	U	Unpriv IC (krste)	N/A	N/A	Q3'22	Q4'22	N/A	complete	complete	19 Jan 2023		n
Total Store Ordering	Ztso	24 Jun 2022	Ratified		Y	U	Unpriv IC (Earl Killian)	N/A	N/A	Q3'22	Q4'22	N/A	complete	complete	19 Jan 2023		?

Non-ISA Specifications

2022

ISA Specifications

Non-ISA Specifications

2021