Date
Disclosures
Participants
Agenda
Presentations
Title | Presenter | File | |
---|---|---|---|
1 | QEMU analysis of glibc for riscv zimte | Christoph Müllner | https://drive.google.com/drive/folders/1UM0eWtmUsZYCO1BFOZ25bWShpYJ-2EbZ |
2 |
Notes & Action Items
- Key outcomes
- Allocator need to access chunk headers which must be with a constant tag value (tag == 0) or elide tag checks on those checks. Current zimte spec uses pointer_tag == 0 as elision for tag checks. It is going to change as it provides bypass. If TG ends up defining a elide mechanism, that will be useful for these needs as well.
- Focus on 4 bit tags but keep ISA (and thus allowing software as well) tagwidth agnostic.
- ldtag/gettag usage is still not clear
- special invalid tag makes generation of tag and addition of tag flows a bit cumbersome due to the fact hw/sw need to work together to avoid that special invalid encoding. We added this to make good use of one extra bit (in mctag) we have with 7 bit tagging. Although to make things homogenous with 4 bit tagging, we ended up using an entire encoding. If we focus only on 4 bit tagging, we can get rid of notion of invalid tag and let it get introduced whenever a new extension comes for 7 bit tags