All RISC-V standard extensions that are not a single capital letter start with either a S (Privileged ISA extension) or a Z (Unprivileged ISA extension).
The second letter of the extension name specifies the category of the extension.

S* Categories (Privileged ISA)

The second letter is the category of the extension (usually the privilege level associated with the extension).

S* Prefix	Meaning

S* Prefix	Meaning
Sd	Debug
Sh	Hypervisor (HS-mode and VS-mode)
Sm	M-mode
Ss	S-mode
Su	U-mode
Sv	Virtual memory
S?n	Level immediately less than "?" level

A new convention started with the pointer masking extension in May 2023 was to use a 3rd letter of "n" to indicate the next lower privilege level (whatever that is for a particular implementation). The extension only exerts control at the next lower level, not at all lower levels.

Z* Categories (Unprivileged ISA)

The second letter is often the original RISC-V capital letter extension name as listed in the RISC-V Unprivileged ISA specification. For example, A = Atomics so Za is the prefix for atomic-related extensions.

Z* Prefix	Meaning	Z* Prefix	Meaning

Z* Prefix	Meaning	Z* Prefix	Meaning
Za	Atomics	Zj	Java
Zb	Bit manipulation	Zk	Scalar crypto
Zc	Compressed	Zm	Multiplication and division
Zf	Single-precision floating-point	Zv	Vector
Zh	Hypervisor	Zvk	Vector crypto
Zi	Base integer ISA

S* Examples

S* Extension	Meaning

S* Extension	Meaning
Shvstvecd	The vstvec.MODE CSR field supports direct mode
Svbare	The S-mode virtual-memory satp "Bare" mode is supported
Ss1p13	Privileged Architecture version 1.13 (p = period)
Sv39	The S-mode virtual-memory address size is 39 bits

Z* Examples

Z* Extension	Meaning

Z* Extension	Meaning
Zbb	Basic bit manipulation instructions
Zfhmin	Half-precision floating-point transfer and conversion instructions
Zkne	AES scalar encryption
Zjpm	Pointer-masking extension for J category
Zicsr	CSR read/write instructions
Zicbom	Cache block management instructions

RISC-V Reference Links

These links explain the naming convention shown above.

RISC-V Unprivileged ISA Specification

See "ISA Extension Naming Conventions" chapter.

Google groups post in 2017 Excerpts

The current RISC-V standard instruction-set namespace consists of 26 single-letter names, and each letter typically corresponds to a relatively large number of instructions. While this has worked well to concisely specify the initial set of extensions and to convey the concept of a modular instruction set, there is a need for a larger instruction-set namespace to accommodate future instruction-set extensions.

The proposal is to use multicharacter names beginning with Z to expand the namespace for standard extensions, for example, Zftrig to name the ftrig extension. Underscores are used in an ISA name string to separate Z names from other components, and instruction-set names are case-insensitive.

All Z instruction-set names begin with a single letter that indicates the category of the extension. All existing single-letter names retain their existing meaning, and are given alternate names in the Z namespace of Z followed by the single letter, e.g., Za = A. Each existing single letter name is now also considered to name a category, and additional instruction-set extensions can be added to the existing single-letter categories, e.g., Zftrig. The unallocated single-letter names are now reserved for future instruction-set categories, rather than a single fixed extension.

GitHub post in 2021 to RISC-V ISA manual Excerpts

The convention is that S* represents extensions to the Privileged architecture (versus the Unprivileged arch). The second letter represents categories:

v = virtual memory
d = debug
m = M-mode
s = S-mode

ISA extensions that include M-mode and S-mode functionality will be represented as two privilege-level specific extensions.