Ratification Plan Milestone Review
This document is currently a draft.
This document outlines the plan to ratify a RISC-V Specification, establishing a solid foundation and clear expectations for the entire specification development lifecycle. The timeline set here will serve as a reference to monitor progress and ensure milestones are met. Investing in a well-prepared plan promotes effective communication, enhances collaboration, and streamlines the process.
About
Specification Name: Composable Custom Extensions
Task Group: Composable Custom Extensions Task Group
Task Group Charter: Charter
Background
Reuse of multiple custom extensions is rare, in part because custom extensions may conflict in use of custom instructions and CSRs, and because there is no common programming model or API for custom extensions. This can lead to disjoint solution silos and ecosystem fragmentation. To help address this gap, the TG will advance interop standards that make it easier to reuse certain kinds of custom extensions, enabling a plug-and-play ecosystem of such extensions.
Overview
The TG will define a framework of ISA and non-ISA specifications that together facilitate the decentralized, cooperative reuse of the custom instruction and custom CSR space, enabling practical reuse, within a system, of multiple, independently authored composable custom extensions (CXs), CX libraries, and CX unit (CXU) logic modules, while also remaining backwards compatible with legacy custom extensions.
Stakeholders Identification
Privileged Architecture HC - ISA changes
SoftCPU SIG - Use case
Unified Discovery TG - Discovery
Platform Runtime Services TG - Discovery, configuration
Toolchains SIG - ABI support
psABI - ABI
References: Active Groups and Specifications Under Development
Design Considerations
Specifications are being designed to be useful to a variety of design point: FPGA and ASIC, microcontroller through HPC.
Proof of concept will demonstrate supervisor operating system, but specifications are intended to be useful for M and M/U only systems as well.
Proof-of-Concept and Tests
Proof-of Concept
Reference designs for all components that are specified, demonstrating interoperation where deemed necessary; an implementation of the API and ABI as part of implementing an end-to-end software PoC, including all discovery and configuration components.
Software Support (OS, RTOS, Hypervisor, etc.)
Linux
Simulator Support
QEMU - CX framework support; example composable custom extension
Spike - Not planned
SAIL - CX framework support
Tests (ACT for ISA or Software)
Planned
Software Ecosystem Impacts
Operating systems
Linux - Discovery and configuration, context management, access control
Hypervisors
Not planned
Libraries
glibc - Discovery and configuration, user context management
Other run-times/languages
Not planned
Applications (direct use)
Not planned
Freeze Checklists
Select one of the options below (ISA or NON-ISA) and complete the table with the required information.
Key Milestones
Milestone | Date |
---|---|
Plan Approval | Nov 13, 2024 |
Internal Review Start | Nov 13, 2024 |
ARC Review Freeze Request | Nov 13, 2024 |
Freeze | Nov 13, 2024 |
Public Review Start | Nov 13, 2024 |
TSC Ratification Approval | Nov 13, 2024 |
BoD Ratification Approval | Nov 13, 2024 |
Additional Notes
Related content
RISC-V International