RISC-V Technical Specifications Archive
This page contains the list of all archived ratified technical specification version. For the most recent versions of any specification, see the RISC-V Technical Specifications page.
NOTE: specifications not found on this page have only one version and thus are only available on the RISC-V Technical Specifications page.
Archive Contents
ISA Specifications
These sections contain previous, complete versions of the two ISA specification volumes.
The RISC-V Instruction Set Manual Volume I: Unprivileged ISA
Version | Publish Date | RISC-V Community | Source Repository |
---|---|---|---|
Dec. 2019 |
The RISC-V Instruction Set Manual Volume II: Privileged Architecture
Version | Publish Date | RISC-V Community | Source Repository |
---|---|---|---|
Dec. 2021 |
ISA Ratification Specifications
This section contains the specifications which were independently ratified and subsequently have been pulled into the appropriate ISA volumes published on the RISC-V Technical Specifications page.
Specification name | Ratified | New extension(s) or Profile(s) | RISC-V Community | Source |
---|---|---|---|---|
March 2024 | Smcdeleg, Ssccfg | |||
March 2024 | Zimop, Zcmop |
| ||
February 2024 | Smcsrind, Sscsrind | |||
November 2023 | Zicond | |||
November 2023 | Svadu | |||
RISC-V Cycle and Instret Privilege Mode Filtering (Smcntrpmf) | November 2023 | Smcntrpmf | ||
November 2023 | Zacas | |||
RISC-V Cryptography Extensions Volume II: Vector Instructions | September 2023 | Zvbb, Zvbc, Zvkb, Zvkg, Zvkn, Zvknc, Zvkned, Zvkng, Zvknha, Zvknhb, Zvks, Zvksc, Zvksed, Zvksg, Zvksh, Zvkt | ||
"Zfa" Standard Extension for Additional Floating-Point Instructions | September 2023 | Zfa |
| |
June 2023 | Smaia, Ssaia | |||
“Zvfh/Zvfhmin:” Vector Extension for Half-Precision Floating-Point Arithmetic/Vector Extension for Minimal Half- | June 2023 | Zvfh, Zvfhmin |
| |
May 2023 | Zihintntl |
| ||
April 2023 | Zca, Zcb, Zcd, Zce, Zcf, Zcmp, Zcmt | |||
March 2023 | Zicntr, Zihpm |
| ||
January 2023 | RV32E/RV64E | |||
January 2023 | Ztso | |||
November 2022 | Zawrs | |||
June 2022 | Zmmul | |||
PMP Enhancements for memory access and execution prevention on Machine mode (Smepmp) | November 2021 | Smepmp | ||
November 2021 | Sm1p12, Ss1p12, Sv57, Hypervisor, Svinval, Svnapot, Svpbmt | |||
November 2021 | Zicbom, Zicbop, Zicboz | |||
November 2021 | Zba, Zbb, Zbc, Zbs | |||
November 2021 | Sscofpmf | |||
RISC-V Cryptography Extensions Volume I: Scalar & Entropy Source Instructions | November 2021 | Zbkb, Zbkc, Zbkx, Zknd, Zkne, Zknh, Zksed, Zksh, Zkn, Zks, Zkt, Zk, Zkr | ||
November 2021 | Smstateen | |||
November 2021 | Sstc | |||
November 2021 | Zve32x, Zve32f, Zve64x, Zve64f, Zve64d, Zve, Zvl32b, Zvl64b, Zvl128b, Zvl256b, Zvl512b, Zvl1024b, Zvl, Zv |
| ||
"Zfh" and "Zfhmin" Standard Extensions for Half-Precision Floating-Point | November 2021 | Zfh, Zfhmin | ||
"Zfinx", "Zdinx", "Zhinx", "Zhinxmin": Standard Extensions for Floating-Point in Integer Registers | November 2021 | Zfinx, Zdinx, Zhinx, Zhinxmin | ||
February 2021 | Zihintpause |
Non-ISA Specifications
These sections contain previous versions of non-ISA specifications.
NOTE: specifications not found on this page have only one version and thus are only available on the RISC-V Technical Specifications page.
RISC-V Supervisor Binary Interface Specification
Version | Published | Description | RISC-V Community | Source | |
---|---|---|---|---|---|
May 2022 | Describes the RISC-V Supervisor Binary Interface, known from here on as SBI which enables supervisor-mode (S-mode or VS-mode) software to be portable across all RISC-V implementations by defining an abstraction for platform (or hypervisor) specific functionality. |
RISC-V International