2025-02-25 Ordinary Meeting Notes
Feb 25, 2025 | RV-LFX Self-hosted Trace TG
Attendees: Beeman Strong
Notes
Attendees: Beeman, Andrew, Daniel, Bruce, Matthew, Iain, Bo, Greg
Agenda
Continue trace memory buffer address translation
Trace page faults
Trace buffer management
Trace memory buffer address translation
Recapped some of the discussion from last time
Propose 2 modes for trace output writes:
Default: use the translation regime of the mode to which trace is delegated
Alternate: use page tables and *IDs in new tatp/hgtatp registers
Both are regardless of the current priv mode, trace translation regime does not change
Default is sufficient for most usages (application trace, bare metal OS + app trace, root hypervisor and/or guest trace, …)
Alternate needed for nested hypervisor tracing guest, or for M-mode tracing other modes
Because in these cases none of the *atp registers hold the desired translation config
For nested HV tracing guest, want trace during guest execution to use the nested HV’s vsatp/hgatp. So root HV can set tatp/hgtatp to point to them.
For M-mode, can use tatp to make trace use bare mode even in other priv modes
Trace TLB entry management
Trace TLB entries have ASIDs/VMIDs just like loads and stores do, and those entries should be flushed by the same SFENCE/HFENCE insts
Though when hgtatp is in use, trace VMID can be different from current guest’s VMID. In such cases, HFENCE.VVMA will not flush those entries.
Spec should include recommendation that trace TLB entries are separate, likely only need two since pages don’t tend to be re-used once filled
Trace page faults
Can skid, since trace writes are asynchronous
E.g., can get trace PF for VS-mode trace while in HS-mode
Will discuss next time
Action items
Feb 11, 2025 - Beeman Strong - cover trace translation flush scenarios
Discussed via email and in this week’s meeting
Related content
RISC-V International